A Software-Defined AI/HPC Rack-scale Emulation Platform and Hyperscale Data Center Facility Twin
The facility twin is an early-stage experimental extension
Five programmes built from scratch: a rack-scale emulation platform, a computer architecture, an in-kernel execution engine, a secure packet-processing system on chip, and a reproducible declarative Linux distribution. Each is at a different point in research, development, and publication.
A Software-Defined AI/HPC Rack-scale Emulation Platform and Hyperscale Data Center Facility Twin
The facility twin is an early-stage experimental extension
Incarnation of DEC PDP-11 into RISC-V
An experimental 64-bit general-purpose computer architecture for Agentic Infrastructure
A RISC-V ISA In-Kernel Bytecode JIT VM
RISC-V Pass-through Native ISA, JIT VM Translation, and FPGA Soft-core
Keystone Enclave Secured TRusted eBPF Logic on RISC-V - PCIe Accelerator
Mitigating Cross-Tenant Slot-Memory Access and Over-Broad Host-Memory DMA
A Reproducible Declarative Linux Distribution Configured in Hermetic Python
PyBonsai system descriptions and the Lattice package manager
All five projects are under active research or development. The PyrixOS source repository is public on GitHub. Cnuas has a public arXiv preprint and a submitted QEMU patch series. Each project's availability page records the current source, upstream, and publication status.
For collaboration, or to be notified when artifacts are released, please get in touch.