Cnuas Product Roadmap & Project Plan¶

Scope: Cnuas Virtual AI HPC Infrastructure and all components · Version: `fd0f896-dirty` · Updated: 2026-07-05

This page is the single source of truth for what is available today versus what is planned. It is organised as Epics (major workstreams) broken into Tasks, mirroring the GitHub Projects board used for day-to-day tracking.

Status legend¶

Symbol	Meaning
✅ Available	Implemented, tested, and shipped in the current tree
🚧 In Progress	Actively being worked on
📋 Planned	Scheduled; not yet started
⛔ Blocked	Waiting on a dependency

An entry may be marked available only when the Validation Matrix names a test for it and records that the test passes.

Roadmap at a glance¶

timeline title Cnuas Delivery Horizons section Now - Available CnuasNIC RoCEv2 + Native IB : RC/UD/SMI/GSI, atomics, SRQ, multicast, ICRC CnuasSwitch fabric : 10-port RoCE/IB, DCB, in-switch Subnet Manager CnuasGPU runtime : SIMT, libcnuasrt, AVX2/AVX-512 SGEMM CnuasLink fabric : frame protocol, FDB, discovery Platform : VM lifecycle CLI, packaging, submodule split, datasheets section Next - In Progress CnuasNIC IB SM : SA path-record, PMA/perfquery, opensm compat CnuasGPU compute : backend refactor, dlopen loader Docs : ASCII to mermaid, roadmap, RoCE/IB HowTo rewrite section Later - Planned CnuasGPU devices : device-backend refactor, CnuasIR interpreter FPGA : Verilog + Libero skeleton on PolarFire SoC Collectives : UCCL P2P + AllReduce/AllGather

Epics and tasks¶

Epic 1, CnuasNIC, RDMA NIC (RoCEv2 + native InfiniBand)¶

Repo: PacketFive/CnuasNIC (v0.1.0-26-gbc3a3c9)

Status	Task	Milestone
✅ Available	RoCEv2 TX path	H1
✅ Available	RoCEv2 RX path	H2
✅ Available	RC reliability + RDMA READ	,
✅ Available	RC atomics (CMP_SWP, FETCH_ADD)	,
✅ Available	Multi-packet WRITE/READ honouring path MTU	,
✅ Available	Real ICRC compute + validate on RX	,
✅ Available	Shared Receive Queue (SRQ)	,
✅ Available	UD QPs + IB multicast (attach_mcast)	,
✅ Available	Per-port IB link layer + dual port_immutable	I1
✅ Available	LRH + IB opcodes; parallel IB skb builder	I2, I3
✅ Available	Wire IB skb through QEMU vNIC + switch pipeline	I4
✅ Available	QP0 MAD plumbing; SMA GET/SET; directed-route SMPs	I5a, I5c
✅ Available	SM wire-format + kernel SMI groundwork	I5f
✅ Available	LRH-aware RX dispatcher	I6
✅ Available	End-to-end test gate (pingpong + perftest + ibstat)	I7
✅ Available	NCCL / UCX build+link gates	,
📋 Planned	SA path-record responder on QP1	I5f-SA
📋 Planned	PMA + perfquery support	I5g
📋 Planned	opensm-in-VM compatibility lab	I5h
📋 Planned	RoCE/IB HowTo rewrite (RoCEv2 + Native IB)	I8
📋 Planned	Debug ib_umad `/dev/infiniband/umadN` creation	,
⛔ Blocked	UCCL-P2P RDMA transfer engine smoke	,
⛔ Blocked	UCCL collective (AllReduce) host-mem smoke	,

Epic 2, CnuasGPU, Virtual GPU + Runtime¶

Repo: PacketFive/CnuasGPU (v0.2.0-14-ga157b80-dirty)

Status	Task	Milestone
✅ Available	GPU driver scaffold + `/dev/cnuasgpuN` char device	Phase 2
✅ Available	ioctl set (INFO/ALLOC/FREE/MEMCPY/LINK_*)	,
✅ Available	`libcnuasdev` low-level driver shim	,
✅ Available	`libcnuasrt` CUDA-style runtime	,
✅ Available	Vector add compute primitive	5b
✅ Available	Tile-based SGEMM (AVX2/FMA)	,
✅ Available	AVX-512 SGEMM	6.3
✅ Available	Multi-GPU verification	,
✅ Available	`cnuassmi` / `cnuas-smi` CLI	,
✅ Available	Compute-backend refactor (scalar/AVX2/AVX-512 + dispatch loader, per-backend `.so` artefacts)	6.1
✅ Available	Split backends into `.so` + dlopen loader	6.1c
📋 Planned	Device-backend refactor	6.2
✅ Available	CnuasIR object format, frozen header and reference parser	6.4a
✅ Available	CnuasIR packer, disassembler and validator tools	6.4b
✅ Available	CnuasIR interpreter backend and the kernel launch API	6.4c
📋 Planned	FPGA Verilog + Libero skeleton (PolarFire SoC)	6.5
📋 Planned	Documentation pass	6.6

Epic 3, CnuasSwitch, Virtual TOR Switch¶

Repo: PacketFive/CnuasSwitch (v0.1.0-8-gd630c1f)

Status	Task	Milestone
✅ Available	10-port switch daemon (`cnuas-vswitchd`)	,
✅ Available	RoCEv2 + native IB forwarding	,
✅ Available	DCB: PFC / ETS / ECN	,
✅ Available	Ethernet FDB + IB LFT	,
✅ Available	Switch-side SMA	I5d
✅ Available	In-switch Subnet Manager	I5e
✅ Available	SM SMP wire-format fix for kernel CA acceptance	I5f
✅ Available	OpenTelemetry telemetry export	,
✅ Available	JSON management API (18+ commands)	,
📋 Planned	Switch-side SA/PMA alignment	I5g

Epic 4, CnuasLink, GPU Fabric Interconnect¶

Repo: PacketFive/CnuasLink (v0.1.0-3-g812f464)

Status	Task	Milestone
✅ Available	GPU fabric switch daemon (`cnuasgpu-link-switchd`)	P1
✅ Available	8-port frame-based protocol	,
✅ Available	FDB learning + discovery + keepalive	,
✅ Available	CnuasGPU ↔ switch wiring	P2
✅ Available	Link state in sysfs + `cnuassmi`	P2.1
✅ Available	`cnuaslink-cli` management CLI	P4
📋 Planned	Collective offload (AllReduce / AllGather) end-to-end	,
📋 Planned	Bandwidth / latency modelling	,

Epic 5, Platform, Tooling & VM Lifecycle¶

Superproject: PacketFive/cnuas (fd0f896-dirty)

Status	Task	Milestone
✅ Available	VM lifecycle CLI (`vm up/down/ssh/console/lab`)	6.2e
✅ Available	Package + image build subcommands	6.2c, 6.2d
✅ Available	Kernel port to v6.19 + binary `.ko`/`.deb` packaging	6.2f
✅ Available	Deployment tooling	,
✅ Available	Repo split into per-component submodules	,
✅ Available	QEMU fork tagged for consumers	,
✅ Available	CI strategy (Azure DevOps)	6.0e
✅ Available	Build system (Bazel + Make)	,

Epic 6, Documentation¶

Status	Task	Milestone
✅ Available	Design docs (topology, switch, CnuasLink, CnuasGPU, driver, control plane)	6.0
✅ Available	Component + platform datasheets	,
✅ Available	Live version wiring from git tags	,
✅ Available	Version pinning reference	,
✅ Available	Convert ASCII diagrams to mermaid across docs	,
🚧 In Progress	This roadmap	,
📋 Planned	RoCE/IB HowTo rewrite	I8

Epic 7, CnuasBMC, OCP Rack Management (BMC + OOB)¶

Superproject: PacketFive/cnuas (fd0f896-dirty), layer for OpenBMC contribution

Status	Task	Milestone
✅ Available	PCIe Link Capabilities on CnuasNIC + CnuasGPU (Gen5 x16, configurable)	,
✅ Available	Management plane design (fidelity tiers, topology, protocol surface)	,
🚧 In Progress	`meta-cnuas` OpenBMC layer (cnuas-sled/tor/rmc machines)	,
🚧 In Progress	Renode satellite skeletons (BMS, PSU, fan, optics, sequencer, front panel)	,
📋 Planned	Isolated management bridge + one real OpenBMC on QEMU ast2600	,
📋 Planned	Redfish power wired to VM lifecycle + Serial over LAN	,
📋 Planned	`cnuas bmc/power/rack` command groups + Redfish aggregation	,
📋 Planned	Cnuas machine device trees + branded firmware image	,
📋 Planned	BMS over RS-485 with real firmware in Renode	,
📋 Planned	Thermal Simulation model for fans and airflow (research)	,
📋 Planned	DC-SCM root of trust + SPDM attestation bench (optional)	,

Epic 8, Accelerator Software Stack¶

Repo: PacketFive/CnuasGPU (v0.2.0-14-ga157b80-dirty)

The compiler, instruction set, collectives, one sided messaging and numerical libraries. Every component here has a preview datasheet recording the specified design.

Two of these do not wait for the compiler. CnuasBLAS v0.1 wraps the SGEMM and vector kernels that libcnuasrt already ships and is done; a first CnuasCCL moves buffers over CnuasLink and reduces them with those same kernels, and needs no compiler either. CnuasCCL does however need two things that did not exist when Epic 8 was written, a userspace CnuasLink transport and a chosen bootstrap protocol, which is why it is split into 8.2a to 8.2c. The transport shipped as part of CnuasDev in 8.2a and the bootstrap decisions were settled in 8.2b, so CnuasCCL v0.1 is implemented. It carries collective payloads over the caller's bootstrap channel rather than the fabric, because the receive path has no demultiplexing, ordering or delivery guarantee yet; section 3 of the design document sets out what an in band version has to add first.

Everything that runs a user written kernel still waits on the CnuasIR chain in Epic 2 milestone 6.4.

Status	Task	Milestone
✅ Available	CnuasBLAS v0.1 over the shipped SGEMM and vector kernels	8.1
✅ Available	Userspace CnuasLink transport wrapper in CnuasDev	8.2a
✅ Available	CnuasCCL rank bootstrap protocol, decisions recorded	8.2b
✅ Available	CnuasCCL v0.1, broadcast, AllReduce and AllGather	8.2c
✅ Available	CnuasIR scalar subset completion, the target a compiler needs	8.3a
✅ Available	`cnuascc` front end, device C subset parser and type checker	8.3b
📋 Planned	`cnuascc` code generator emitting CnuasIR objects	8.3c
⛔ Blocked	CnuasSHMEM one sided put, get and atomics	8.4
⛔ Blocked	CnuasBLAS v0.2, kernels generated through `cnuascc`	8.5
⛔ Blocked	CnuasDNN, CnuasFFT, CnuasSPARSE, CnuasSOLVER	8.6
⛔ Blocked	`cnuas-prof` profiler and `cnuas-dcgmi` telemetry	8.7

Order of work, and why:

6.4c, the interpreter and the launch API. Done. execute_cnuasir had its slot in the compute backend vtable and CNUAS_CCAP_CNUASIR_EXEC was already allocated, so this filled in a hole rather than reshaping the ABI. The runtime gained cnuasModuleLoad, cnuasModuleUnload and cnuasLaunchKernel, without which a program could not reach a backend at all. This unblocks 8.3.
8.3, the compiler. Only once a kernel that the interpreter accepts can be hand written and run does a compiler that emits them have a target to aim at, and a reference to be checked against. 8.3a came first because the original subset could not express ordinary code: with no fsub.s there was no lowering for a subtraction between floats, and with no logical or compare instructions neither a bitmask nor a predicate could be computed. Filling those holes is cheap; discovering them halfway through a code generator is not. 8.3b then cut the language to what that subset can express, rather than accepting C and refusing half of it during code generation, so that every rejection lands on a token with a note saying what to write instead.
8.4 onward. One sided messaging and the numerical libraries are ordinary consumers of the launch API.

8.1 and 8.2 run in parallel with all of the above, since they depend only on what is already shipped.

Project management¶

Day-to-day tracking lives in GitHub Projects (Projects v2), because the component repos already live under the PacketFive GitHub organisation, so Epics and Tasks link directly to issues, pull requests, and commits.

Epics map to the seven workstreams above (label epic).
Tasks map to individual table rows (label task), linked to their Epic and to the owning component repo.
Status field mirrors the legend (Available / In Progress / Planned / Blocked).

The board is seeded and kept in sync from a machine-readable source of truth:

scripts/roadmap/roadmap.csv, every Epic and Task with status, milestone, and repo.
scripts/roadmap/seed_github_project.sh, creates the Project, labels, and issues via the gh CLI.

Seeding the board¶

# One-time auth with project scope
gh auth login
gh auth refresh -s project,read:project

# Preview what would be created
scripts/roadmap/seed_github_project.sh --owner PacketFive --dry-run

# Create the board + issues
scripts/roadmap/seed_github_project.sh --owner PacketFive --title "Cnuas Roadmap"

Keeping this roadmap current¶

Update scripts/roadmap/roadmap.csv when a task changes status.
Re-run scripts/roadmap/seed_github_project.sh --sync to reflect changes on the board.
Component versions on this page and in the datasheets update automatically from git tags at documentation build time (no manual edit needed).